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RT Book, Whole SR Print DC OPAC T1 Logic minimization algorithms for VLSI synthesis / by Robert K. Brayton [et al.] T2 The Kluwer international series in engineering and computer science A1 Brayton, Robert King YR 1984 FD c1984 SP ix, 193 p. K1 Logic design K1 Integrated circuits -- Very large scale integration K1 Integrated circuits -- Design and construction -- Data processing K1 Algorithms PB Kluwer Academic Publishers PP Boston SN 0898381649 LA English (英語) CL LCC:TK7868.L6 CL DC19:621.381/73 NO Bibliography: p. [174]-190 NO Includes index NO 書誌ID=B000081412; NCID=BA00237874; LK [OPAC]https://lib.pu-toyama.ac.jp/opac/opac_link/bibid/B000081412 OL 30